A 65nm WiMax chip built with Fujitsu new chip-design tool has reduced power leakage by as much as 88%, while overall power consumption has been cut but 36%, which could affect battery life. Current leakage happens in practically all computer chips, although at different levels. It represents the level of current lost/consumed, even when the cheap is doing nothing. it is a hard problem to solve as reducing leaks usually involves creating a material that is very conductive at times when the chip is active and a good electric insulant when it is not. Intel does something like that with its Corei7 to reduce leakage.
Fujitsu has developed the “Fujitsu Reference Design Flow 3.0″ (a library) which uses the Common Power Format – a verification tool that checks that semi-conductors are implemented with a low-power leakage methodology. Without comparative numbers, it’s hard to tell if it’s really better than competing products.
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