Each square in the middle represents one core...

While Intel has talked about its Many Integrated Core (MIC) architecture for some time, it has shown its 50 Cores chip for the first time today at the SC11 supercomputing conference. Codenamed Knights Corner, many 50-core chips will work as co-processors for many Intel Xeon E5 processor CPUs. Intel mentioned that the University of Texas is building a 10 petaflop (a measure of computational speed) computer with such a mix. Interestingly, Knights Corner has been spun off from the former Larrabee project: Intel’s (failed) GPU killer.Intel’s foray into this type of computing is part of a larger arms race that was launched when graphics processors (GPUs) started to be used for general purpose computing. In fact, GPUs and Knights Corner are something in common: both are a massive array of processing cores, but there are a few differences:

Knights Corner is equipped with cores built on Intel’s X86 architecture that is closer to regular CPUs. Intel argues that because of that, they can provide a toolset to developers that is better. While this is true to some extent, it should also be taken with a grain of salt. X86 or not, this heterogeneous architecture is relatively new.

GPUs on the other hand tend to be more efficient than CPUs in terms of FLOPS per Watt, although I’m not sure how Knights Corner fares in that respect. I haven’t seen any relevant numbers on this matter, so don’t jump to conclusions.

In any case, everyone seems to agree that just adding CPUs won’t scale as efficiently as adding many-cores chips into the mix. Now, the question is: who will reach the Exaflop (1000 petaflop) barrier first, and how efficiently?

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